ML Silicon Performance Lead

OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform.

We’re looking for an ML Silicon Performance Lead to drive hardware/software co-design for our silicon architecture. You will work across models, kernels, compilers, and silicon to shape how ML workloads map to hardware—and how the hardware should evolve to support them. Your work will connect model and workload requirements with compute, memory, and specialized acceleration capabilities to maximize performance, efficiency, and scalability across current and future generations of AI silicon.

You’ll partner closely with ML research, compiler, and silicon architecture teams to jointly develop software approaches and hardware capabilities. From kernel mapping and quantization to new data structures and specialized IP, you’ll evaluate hardware and software tradeoffs to improve performance, efficiency, and utilization across large-scale AI workloads. Through performance modeling, simulation, and hands-on optimization, you’ll guide architectural decisions and validate improvements on representative workloads.

IN THIS ROLE, YOU WILL:

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