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Job Opening

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Principal Technical Program Manager, Annapurna Labs, Inc

Amazon · Austin, TX · Posted 21 days ago

$177k–$275kmgr
10+ yrs expRTLPhysical designVerificationTiming closureDFTPackagingHBMDie-to-die interfaces

Own the integrated schedule and critical path for Amazon's most complex hardware program, a multi-die chiplet ML accelerator running from RTL freeze through tape-out to production.

Annapurna Labs designs the custom silicon that powers AWS's machine learning infrastructure, including the Trainium and Inferentia chip families. Our next-generation ML accelerator is a multi-die chiplet using state-of-the-art packaging technology, and it is the most complex hardware program Amazon has undertaken. We are looking for a Principal Technical Program Manager to own end-to-end program execution for this chip, from RTL freeze through tape-out and into production readiness.

This is not a status-reporting role. You will be the person who connects a sprawling set of engineering workstreams into a single coherent schedule, identifies the real critical path week to week, and drives the cross-functional decisions that keep the program on track. The program spans multiple concurrent silicon development efforts with significant interdependencies across engineering disciplines, external partners, and infrastructure.

Key job responsibilities Own the integrated schedule and critical path analysis across multiple die tape-outs through engineering samples and production ramp. Understand dependency chains deeply enough to calculate the impact of any slip or pull-in, and update the timeline weekly with real data. Drive the weekly chip status cadence by synthesizing inputs from RTL/DV, physical design, packaging, power, infrastructure, and post-silicon teams into a single view that tells leadership where we actually stand, including what is getting worse and what needs action. Track verification convergence as a leading indicator by monitoring the progression from feature completion through RTL closure, bug trends, and regression pass rates by block. Recognize when convergence is stalling and drive the engineering response before downstream milestones are affected. Manage the external design partner interface, owning the netlist delivery calendar, tracking your partner's physical design timeline, and negotiating schedule trades with a clear understanding of downstream cost. Drive infrastructure readiness and external IP delivery by partnering with compute and EDA platform teams on capacity planning, and tracking third-party PHY, memory interface, and controller IP deliveries against consuming blocks to escalate gaps before they become tape-out critical.

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There are 17,473 open roles at Amazon right now. This role is one of 34 Technical Program Manager openings in Austin, TX and centers on Rtl, Physical Design, Verification, and Timing Closure.

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