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Silicon Architect, Subsystem Architecture
Meta Platforms · Sunnyvale, CA · Posted today
"Define on-chip memory for accelerator subsystems in Meta's custom wearable chips, balancing power, performance and area under tight wearable budgets."
Reality Labs focuses on delivering Meta's vision through creating advanced AR/AI enabled wearables. The compute performance and power efficiency requirements of wearables require custom silicon. Reality Labs Silicon team is driving the state-of-the-art forward with breakthrough work in AI, augmented reality, computer vision, machine learning, graphics, displays, and sensors. Our chips will enable wearable devices where our real and virtual worlds will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms.
As a Memory Architect on the Subsystem Architecture team, you will work with senior memory architects to analyze and define on-chip memory for the accelerator subsystems and IPs in our wearable chips, from caches and scratchpads down to SRAM selection, balancing power, performance and area (PPA) under tight wearable budgets.
This posting is sourced from Meta Platforms's own career site — applying takes you there directly.
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This role centers on Sram, Computer Architecture, Memory Architecture, and Caches. There are 1,402 open roles at Meta Platforms right now.
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