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Why you fitThis role calls for Asic Physical Design and Timing Closure — tell us what you know and we'll check the rest.
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Job Opening

ASIC Physical Design, Manager

Synopsys · Bengaluru, Karnataka · Posted 3 days ago

mgr
8+ yrs expASIC Physical DesignRTL-to-GDSIIFusion CompilerICC2PrimeTimeTempusCalibreTiming Closure

Lead a testchip physical design team building the PD flow and methodology that validates Synopsys' next-generation embedded memory IP through tape-out.

Alternate Job Titles • Physical Design Manager

  • ASIC PD Lead
  • Physical Implementation Manager
  • Backend Design Manager
  • Physical Design Engineering Manager

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent years in the trenches of ASIC physical design, and you know that tape out success is not about heroics at the end, it is about the flow you set up, the checks you automate, and the decisions you make when the schedule says one thing and the timing report says another. You have managed teams through multiple silicon cycles and learned that the best managers do not just delegate tasks, they clear blockers, teach judgment, and know when to dive into a floorplan yourself because it is faster than explaining it three times. You think in terms of flows, not just milestones. Setting up a robust RTL-to-GDSII methodology for a testchip team means anticipating where the pain will come from, whether that is a tricky timing path, a foundry DRC that changed mid-project, or a handoff that breaks because someone assumed too much. You are comfortable sitting with front-end designers to understand intent and then translating that into a physical implementation strategy that actually closes. Managing people energizes you. You hire well, you grow engineers into leads, and you know the difference between mentoring someone through a tough closure and doing it for them. At Synopsys, you will lead a team building testchips that prove out next-generation embedded memory IP, and what you deliver will directly enable customer products. What You'll Be Doing

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There are 632 open roles at Synopsys right now. This role centers on Asic Physical Design, Timing Closure, Power Optimization, and Physical Verification.

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