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Design Engineer II
Cadence Design Systems · Shanghai, Shanghai · Posted 11 days ago
Own physical implementation of high-speed DDR and HBM IP on advanced nodes, combining circuit fundamentals with hands-on floorplan and place-and-route work.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Responsibilities:
Focus on high speed digital DDR and HBM IP physical implementation
1. Have good physical design experiences in the digital implementation domain including Floorplan, P&R, Physical verification, DFM.
2. Have a solid background in circuits, electronics &
physics & should be very willing to learn new technology for advance node
and design methodology
3. Skilled in scripting language, such as Perl, C shell,
4. Feeling responsible for technical delivery, good team
played, design quality/schedule focus
This posting is sourced from Cadence Design Systems's own career site — applying takes you there directly.
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This role centers on Physical Design, Floorplanning, Place And Route, and Physical Verification. There are 694 open roles at Cadence Design Systems right now.
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