Digital Physical Design Engineer

A major success factor for the company continues to be the development and deployment of breakthrough Digital/DSP and mixed signal ASICs that drive the performance and value of new products. We have an exciting opportunity for a Physical Design R&D engineer responsible for the physical implementation and tape release of digital and mixed signal ASICs.

About the Team: We are located in Colorado Springs, Colorado at the base of Pikes Peak. You’ll collaborate in a team environment to develop ASICs that meets customer functionality, schedule, and quality requirements. This job will be part of Keysight Laboratories, a world-renowned technology organization which enables Keysight to be first to market with breakthrough products and solutions.

Responsibilities: Digital Physical Design ASIC R&D engineer responsible for both module level as well as SoC Level implementation from RTL to GDS of digital and mixed signal ASICs. Solves complex and high impact design and development problems including customer application issues of varying scope and complexity. Uses product and customer applications knowledge to determine, define, develop, and validate design concepts and methods.

• Participate in the entire spectrum of full ASIC design activities including definition, architectures, digital logic design, IP validation and synthesis.
• Responsible for floor planning, place and route, timing closure, static timing analysis (STA), formal verification, low power design, clock distribution, EMIR analysis and physical verification
• Close sign-off checks, interface with industry foundries and GDS delivery
• Work extensively with cross functional teams to guide architecture with physical design constraints
• Develop tool flows and drive vendors to achieve milestones

Bachelors or master’s degree in electrical or computer engineering. Typically, 0 - 2 years relevant experience. Basic Qualifications:

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