Digital Verification Engineer (New Grad)

Job Description: Digital Verification Engineer assists in the verification of digital and mixed-signal IC's utilizing leading edge technologies with industry standard ASIC tools. Products to be verified may include power management, signal management and mixed signal functions.

MPS products include: switching regulators, sensors, motor control, display drivers, audio amplifiers and power management ICs for fast-growing portable and non-portable markets such as notebooks, cell phones, telecom, digital camera, automobile and network equipment.

Essential Functions :

• Generation of test plans based on design requirements and product datasheets of digital / mixed- signal IC.
• Close interaction with Senior Digital and Analog Designers to develop System Level and Behavioral Models.
• Create Digital Verification environments with UVM and SystemVerilog.
• Write Digital and mixed-Signal testcases and assertions/checkers.
• Analyze and debug test results, code coverage and functional coverage.
• Document and support detailed test plans and reviews.
• Develop Verification IPs and standard tests, environments, checkers, etc.
• Automation and scripting.
• Gate-Level verification.
• Knowledge & Use of industry standard ASIC tools/flow for daily work: Digital Simulators, synthesis tools, DFT, LEC, STA, etc.
• Good written/verbal communication skills and strong team work/collaboration.

Qualifications :

• MS in Computer Science or Electrical Engineering with emphasis in Digital Design/VLSI coursework.
• Has the ability to follow instructions / tasks according to design specifications/procedures.
• Basic knowledge of ASIC development process and digital design techniques.
• Knowledge of standard DV languages (SystemVerilog, UVM) and in behavioral/RTL coding.
• Executing tasks that hit project milestone.
• Knowledge/Experience with the following is a plus:

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