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FPGA IP Solution Design & Verification Engineer

Altera · Penang 15, Penang, Malaysia · Posted 10 days ago

ic
2+ yrs expVerilogSystemVerilogFPGARTL designQuartus PrimeVivadoUVMSystemVerilog Assertions

Job Description: As an FPGA IP Solution Design Engineer at Altera, you will be responsible for designing, developing, and verifying high-quality intellectual property (IP) solutions for Altera's leading-edge FPGA devices. This role involves working across the full IP lifecycle, from architectural definition to customer support.

Key Responsibilities

  • Develop FPGA logic designs, RTL code, and simulation environments for functional units, IP blocks, subsystems, and reusable libraries.
  • Participate in the definition of block architecture and microarchitecture, translating system requirements into implementable FPGA designs.
  • Create prototypes, behavioral and RTL models, and system specifications to support feature development and validation.
  • Prepare logic diagrams and implement RTL that meets system design and test specifications.
  • Develop and deliver software and hardware models that support device-level bring-up, including user-visible functionality, timing, and power behavior.
  • Apply RTL implementation techniques to achieve required power, performance, and area targets; partner with physical implementation teams to qualify designs.
  • Design, implement, and maintain FPGA verification environments, testbenches, simulations, and regression tests.
  • Review verification plans and implementations to ensure design features, corner cases, and requirements are verified correctly.
  • Analyze failing RTL tests, identify root causes, and implement corrective actions to ensure feature correctness and robust operation.
  • Integrate and debug Ethernet MAC, PCS/PMA, and related protocol-stack functionality in FPGA-based platforms.
  • Bring up and validate FPGA designs on hardware, including high-speed interfaces, Gigabit transceivers, clocks, resets, and board-level connectivity.
  • Use Quartus design, compilation, timing analysis, programming, and debug flows to build, optimize, and troubleshoot FPGA images.
  • Perform platform-level debug using FPGA observability tools and lab equipment such as oscilloscopes, logic analyzers, protocol analyzers, signal generators, power supplies, and related test equipment.
  • Investigate design, integration, timing, signal-integrity, and system-level issues; drive issues to resolution in collaboration with cross-functional engineering teams.
  • Document architectures, design decisions, verification results, bring-up procedures, debug findings, and validation status.

…

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