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Hardware Board Validation Engineering, Director
Astera Labs · San Jose, CA · Posted 8 days ago
Lead board validation for rack-scale AI infrastructure, guiding products from architecture through mass production while building and mentoring a hardware team and working directly with cloud and server customers.
Director, Hardware Board Validation Engineering
On-Site - San Jose, Ca
Astera Labs is seeking a Director of Hardware Board Validation Engineering to lead the development, bring-up, and validation of board products that enable rack-scale AI infrastructure. Working closely with ASIC, systems, firmware, signal integrity, power integrity, mechanical, thermal, manufacturing, and customer engineering teams, you will guide products from concept and architecture through qualification and mass production.
This is a hands-on leadership role in a fast-moving environment. You will lead a talented engineering team while stepping in to solve complex technical problems, engage directly with customers, and improve hardware development processes. Your work will help ensure Astera Labs’ connectivity and memory products deliver reliable, high-performance systems for cloud service providers, server manufacturers, and networking OEMs.
Key Responsibilities
- Board Product Strategy and Technical Leadership
- Lead board validation strategy across product definition, architecture, component selection, schematic capture, layout review, bring-up, debug, optimization, qualification, and production release.
- Define validation plans, coverage goals, risk assessments, schedules, and exit criteria for high-speed boards, add-in cards, modules, and system platforms.
- Make hands-on technical contributions to unblock critical design, validation, and customer issues in a dynamic, fast-paced environment.
- High-Speed Hardware Validation
- Direct board bring-up, silicon/PCB debug, system characterization, margin analysis, and performance optimization across voltage, temperature, channel, and workload conditions.
- Validate high-speed NRZ and PAM4 SerDes-based protocols, including PCIe Gen 3 and above and Ethernet 25G and above, as well as LPDDR4/5 or related memory interfaces.
- Apply signal integrity, power integrity, and power architecture expertise to identify risks and drive practical solutions across circuits, power distribution, connectors, sockets, and cables.
- Cross-Functional and Customer Execution
- Partner with ASIC, post-silicon validation, firmware, systems, mechanical, thermal, quality, compliance, manufacturing, and customer engineering teams to deliver robust board products.
- Engage key customers to understand system requirements, evaluate form factors, propose complete board solutions, and resolve issues through production support.
- Collaborate with contract manufacturers, PCB vendors, and external suppliers to ensure designs are manufacturable, testable, and scalable.
- Team Development and Productization
- Build, mentor, and develop a high-performing hardware engineering team while establishing clear ownership, technical standards, and execution mechanisms.
- Drive products from concept to mass production, including design reviews, validation reporting, manufacturing readiness, documentation, and post-production support.
- Improve hardware development methodologies, lessons learned, and reusable validation practices across Astera Labs’ connectivity and memory product portfolio.
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