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High Speed IO (HSIO) Validation Engineer
AMD · Santa Clara, CA · Posted 2 days ago
Validate PCIe Gen6/Gen7, UALink, and xGMI interfaces on CPU and GPU platforms for data center and AI systems, driving root-cause analysis from silicon bring-up through system debug.
THE ROLE The High-Speed IO (HSIO) Validation Engineer is responsible for validating and debugging high-speed interfaces across CPU and GPU platforms spanning data center servers and AI systems. In this role, you will work closely with PHY design, SI/PI, firmware, and platform teams to execute validation plans, characterize interface performance, and drive root-cause analysis of silicon- and system-level issues. You will play a key role in ensuring product quality and readiness for industry-leading technologies.
WHAT YOU WILL BE DOING
- Execute validation plans for high-speed IO interfaces such as PCIe Gen5/Gen6/Gen7, UALink, xGMI, Ethernet, and other emerging technologies.
- Support post-silicon bring-up, characterization, compliance testing, margining, and interoperability validation across multiple platforms.
- Collaborate with design, architecture, firmware, board, and test teams to investigate and resolve high-speed interface issues.
- Develop and enhance test automation, validation scripts, and data analysis tools to improve validation efficiency and coverage.
- Perform electrical- and protocol-level debug using oscilloscopes, BERTs, protocol analyzers, and other lab equipment.
- Analyze signal integrity, power integrity, and link training behavior to identify root causes and drive corrective actions.
- Document validation findings, debug results, and recommendations, and communicate status to project stakeholders.
- Contribute to the continuous improvement of validation methodologies, best-known methods (BKMs), and lab infrastructure.
WHO WE ARE LOOKING FOR
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