Infrastructure AI/ML Engineer for Memory Design, Characterization, and Yield Optimization

Infrastructure AI/ML Engineer for Memory Design, Characterization, and Yield Optimization

Job Description The Central Engineering Group is seeking an energetic, visionary, and passionate Infrastructure AI/ ML Engineer to lead the Agentic AI Infrastructure development workflow for memory design, characterization, and yield optimization.

In this role, you will collaborate with memory designers and DFT experts to build Agentic AI workflows that drive the development of state-of-the-art embedded memories optimized for PPA, DFT, and yield.

Minimum Education & Experience Qualifications ● Experience: 15+ years of progressive, relevant experience in Memory design, DFT, Silicon Yield Analysis, software architecture and AI systems engineering. ● Education: Master’s degree or Ph.D. in Electrical Engineering or Computer Engineering.

Key Job Responsibilities ● Conceptualize, architect, deploy, and scale robust, distributed multi-agent AI frameworks tailored to transform intricate memory design workflows optimized for performance, power, area, and yield ● Orchestrate long-horizon, autonomous agent executions capable of managing multi-step reasoning, task decomposition, and decision-making across all phases of memory design development, silicon bring-up, and yield analysis ● Seamlessly integrate Large Language Model (LLM)-driven agent pipelines with core Electronic Design Automation (EDA) suites, custom in-house software tools, and enterprise data repositories. ● AI-Driven Debug: Develop and deploy ML models to automate the classification of scan failures (Chain, Stuck-at, Transition) and correlate them with design-for-test (DFT) structures. ● Predictive Yield Modeling: Integrate high-dimensional data—including Fab process parameters, PCM (Process Control Monitoring), and E-test data—to predict yield excursions before they hit the assembly line. ● Partner collaboratively with Memory Design Leads, EDA Tool Specialists, and Infrastructure Engineers to distill complex, domain-specific hardware engineering methodologies into modular, goal-driven agentic workflows. ● Align AI workflow capabilities directly with organizational efficiency targets and technical milestones across the Central Engineering Group.

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