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Intern, job posting 177 of 307

Skyworks Solutions · Posted 39 days ago

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VerilogSystemVerilogHDLDigital DesignDigital VerificationRTL DesignSynthesisStatic Timing Analysis

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Requisition ID: 78463

Seeking a digital design co-op interested in developing complex mixed-signal ICs for frequency control, clock generation, network synchronization, and other timing applications. The candidate will take a supporting role and will be involved in all aspects of the design process from system conceptualization to mass production. For example, a candidate may participate in digital system architecture, block- and system-level RTL design/coding, algorithm and firmware development, digital circuit back-end (e.g. synthesis, timing closure, P&R preparation, scan insertion), firmware development (some ICs include embedded processors), digital design verification, and/or full-chip mixed-signal verification. Responsibilities may also include detailed documentation, test vector development, lab test and evaluation, and other activities as required for the achievement of high-volume production.

  • Digital design specification, design, analysis, and HDL (Verilog/System Verilog) coding
  • Behavioral modeling of analog and mixed signal circuits
  • Digital back-end: synthesis, physical implementation (prep for P&R), static timing, scan insertion, etc.
  • Verification of digital sub-systems, mixed-signal sub-systems, and the entire chip using a combination of digital models/RTL, firmware, and behavioral models. Test bench development
  • Validation of silicon functionality, behavior, and performance

…

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This role centers on Verilog, Systemverilog, Digital Ic Design, and Digital Verification. There are 83 open roles at Skyworks Solutions right now.

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