Lead DFT Engineer (Scan Insertion | ATPG | MBIST )

T HE ROLE : As a member of the Radeon Technologies Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.

THE PERSON: A successful candidate will work with senior silicon design engineer s . The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

K EY RESPONSIBLITIES :

• Implementation and verification of DFT architecture and features
• Scan insertion and ATPG pattern generation
• ATPG patterns verification with gate-level simulation
• Test coverage and test cost reduction analysis
• Post silicon support to ensure successful bring up and enhance yield learning

P REFERRED EXPERIENCE :

• Understanding of Design for Test methodologies and DFT verification experience ( eg. IEEE1500, JTAG 1149.x, Scan, memory BIST etc .)
• Experience with Mentor testkompress and/or Synopsys Tetramax /DFTMAX
• Experience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL design

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in computer engineering/Electrical Engineering with 12+ Years of exp.