P&R Implementation Senior Staff Engineer

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are You have spent years in the trenches of physical design, where the difference between a chip that tapes out and one that stalls in verification often comes down to a floorplan decision made weeks earlier or a timing path nobody caught until signoff. You know Fusion Compiler not as a tool you run, but as a platform you bend to solve real problems on real designs. You have closed timing on something that mattered, debugged a DRC violation that made no sense until it did, and optimized PPA on a block where every picosecond and microwatt counted. Working with foundries does not intimidate you. You have navigated their PDKs, their design rules, their shifting timelines, and you understand that enablement is not about perfect flows, it is about flows that work when a customer has a tapeout date and no room for error. You ask the right questions when a testchip fails bringup, and you do not stop until you know why. You are comfortable working across foundry teams, Synopsys product groups, and end customers, often in the same week. At Synopsys, you will work on advanced node testchips and 3DIC solutions that define what is possible at the edge of semiconductor technology.

What You'll Be Doing

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