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Physical Design Engineer, New Grad
SambaNova Systems · San Jose, CA · Posted 9 days ago
Own real RTL-to-GDS flow work on TSMC advanced nodes, scripting automation in TCL and Python while helping designers debug timing and congestion from day one.
The Physical Design team takes RDU designs through synthesis, place and route, and sign-off on TSMC advanced nodes. We develop and maintain the Cadence based flow, including Genus, Innovus, and Cerebrus, and work with designers and tool vendors to fix flow and design issues.
As a new grad Physical Design Engineer, you'll run and improve our RTL to GDS flow on advanced process nodes. You'll write TCL and Python scripts to automate flow steps, help physical designers debug timing and congestion issues, and work with tool vendors on bugs.
- Run synthesis and place and route using Cadence Genus, Innovus, and Cerebrus
- Write scripts in TCL and Python to automate and improve the physical design flow
- Help physical designers debug timing, congestion, and design rule issues
- Work with tool vendors to report bugs and test flow improvements
- Maintain flow documentation and regression testing
Required Qualifications
- B.S. in Electrical Engineering, Computer Engineering, or Computer Science
- Coursework or project experience in VLSI or digital IC design
- Understanding of the RTL to GDS flow, including synthesis and place and route
- Scripting experience in TCL, Perl, or Python
Preferred Qualifications
- M.S. or Ph.D. in Electrical Engineering, Computer Engineering, or Computer Science
- Experience with Cadence or Synopsys physical design tools
- Familiarity with static timing analysis
- Familiarity with physical design rules on advanced process nodes
- Experience using AI tools such as Claude for flow development
- Internship or tape-out experience, including class or university tape-outs
Base Pay Range $120,000 — $150,000 USD
This posting is sourced from SambaNova Systems's own career site — applying takes you there directly.
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