Principal Engineer, Hardware Emulation

These roles involve working with top-tier emulation vendors to improve capabilities and debug issues. Responsibilities include bringing up the emulation platform for mixed-signal SoCs and developing monitors and checkers for the emulation platform.

The role includes debugging emulation performance and area issues, as well as developing and maintaining the emulation environment. This role focuses on supporting emulation methodology and tools, developing workflows, and collaborating with various teams for productivity during debug and runtime analysis of emulation results.

Location: Daily onsite presence at our San Jose office/headquarters in alignment with our Flexible Work policy

• Technical knowledge and proficiency working with at least one industry-standard HW emulator platform: Palladium, Zebu.
• Own and maintain emulation infrastructure.
• Own and maintain chip level emulation models for validating different subsystems within a networking chip.
• Work with vendors on hardware and tool issues on a need basis.
• Enhance emulation methodology for robustness, test throughput, portability and debuggability
• Work cross functional with simulation, firmware and software test team to validate the chip pre-silicon. Support SW test bring up and debug on hardware emulator, collaborate with hardware design team to triage and fix design issues.
• Leverage understanding of simulation based design verification flows to help emulation test-planning and execution.
• Work cross functional with simulation, firmware and software test team to repro failures seen in real silicon on the emulator.
• BS in Computer/Electrical/Electronic Engineering or Computer Science, and 20 years of relevant experience or a MS in Computer/Electrical/Electronic Engineering or Computer Science with 18 years of relevant experience preferred.
• Emulation experience on any of the emulation platforms : Palladium or Zebu.
• Experience with emulation compile flow, wave dump & triggers, waveform debug, running tests.
• Experience writing scripts in Perl or Python.
• Exposure to Makefile or other build flows.
• Experience with waveform debug tools such as Verdi/SimVision.
• Good understanding of Verilog and SystemVerilog RTL design.
• Exposure to synthesizable SystemVerilog/Verilog code and SVAs.
• Strong communication skills and a team player.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

…