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Senior Principal Engineer-DFT
Marvell Technology · Santa Clara, CA · Posted 2 days ago
Lead DFT architecture across multiple generations of 100G+ per lane ODSP ASICs on TSMC advanced nodes, mentoring a full global DFT team.
Your Team, Your Impact
Marvell’s Optical DSP (ODSP) team within the Connectivity Business Unit develops advanced, industry-leading ASICs for the hyperscale data center, enterprise, and AI infrastructure markets. Our products — including multi-terabit retimers, coherent DSP devices, and high-speed optical transceivers — are critical enablers for efficient, high-bandwidth data transmission across fiber optical networks and electrical interconnects at 100G+ per lane. The ODSP team operates at the leading edge of semiconductor technology, developing chips in TSMC advanced process nodes. We are a global, multi-site engineering organization spanning Santa Clara, Ottawa, Pavia, Irvine, Vietnam, and Argentina — and we are looking for a senior experienced technical leader to serve as a DFT Lead on our next-generation ODSP programs. What You Can Expect
- The position will be responsible for Architecting, Leading and implementing DFT / Test methodology on a complex mixed signal SOC for multiple generations
- The execution involves Design-for-Test Architecture definition, Implementation of various DFT/DFX features, Validation , IP-DFT, STA, pattern generation & Post-Silicon Bringup and Debug for various designs/IPs in Custom/Compute space.
- In this position, the responsibility also includes mentoring, guiding and driving a full team of DFT engineers enabling them for scaling across multiple designs.
- The position involves definition and enhancement of DFT methodologies and tools to be able to benchmark them and enable new methodologies in the domain of DFT/Test.
What We're Looking For
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