Senior Principal Engineer, Physical Designer

Your Team, Your Impact

Built on decades of expertise and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data infrastructure intellectual property (IP) and a wide array of flexible business models. In this unique role, you’ll have the opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance processor chips in a leading-edge CMOS process technology, targeted at server, and networking applications. What You Can Expect

As a senior leader in the central physical design team, you will:

• Shape the long-term vision for physical design capabilities and infrastructure in alignment with company-wide technology strategy
• Lead RTL-to-GDSII implementation for multiple SoC programs, overseeing synthesis, floorplanning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, and physical verification (DRC/LVS)
• Provide strategic leadership and technical direction to physical design teams, ensuring successful and timely tapeouts of complex, high-performance SoCs
• Mentor and develop engineering talent, fostering a culture of innovation, collaboration, and continuous improvement
• Oversee team structure, hiring, performance management, and career development to build and retain a high-performing physical design organization
• Drive cross-functional collaboration with design teams to influence design decisions and ensure successful project execution
• Navigate and resolve cross-functional conflicts effectively, fostering alignment and maintaining momentum across diverse teams
• Drive the development and adoption of next-generation physical design methodologies, flows, and automation to improve productivity and design quality

What We're Looking For

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