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Senior Staff Engineer - Design Verification Power Management

SiFive · Bengaluru, Karnataka · Posted 5 days ago

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10+ yrs expRISC-VUPFUVMVCSPythonPerlTclLow Power Design

Key Responsibilities:

  • Lead the verification and optimization of our diverse RISC-V Low Power Profiles, including UPF.
  • Drive and achieve quality closure targets at both the CPU and block levels.
  • Collaborate closely with microarchitecture and RTL design teams to optimize complex Power flows.
  • Provide technical leadership and mentorship to junior team members to foster team growth and enrichment.
  • Actively participate in the test planning and execution phases for new architecture and design features.

Requirements

  • 10+ Years of experience in low power or power aware or power management
  • Experience with hands on UVM Test Bench development is must
  • Experience in core uArch is highly desirable.
  • Experience in leading effort and driving multiple projects
  • Experience with power simulation on vcs and upf.
  • Experience with script writing in Python, Perl or Tcl.
  • Experience with power impact at architecture, logic design, and circuit levels.
  • Excellent problem solving skill and ability to work in a dynamic and diverse environment.

Qualification:

  • A minimum of bachelor’s or master’s Degree, or equivalent in Electrical & Electronic Engineering or Electrical & Communication Engineering or VLSI with consistently good academics

Additional Information:

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