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Senior Staff Engineer Radio Frequency Design (f/m/div)Villach + 1 moreHRC1836038Hybrid
Infineon · Posted 23 days ago
Drive next-generation Frequency Synthesizer design from concept to silicon, combining deep RF expertise with digital-assisted approaches in cutting-edge wireless applications.
Join our international RF and mixed-signal design team and drive the development of next-generation Frequency Synthesizers for cutting-edge semiconductor solutions. In this role, you will combine deep analog and RF expertise with digital-assisted design approaches, working closely with system architects, digital designers and validation experts from concept to silicon. Your role Key responsibilities in your new role PLL Concept & Architecture: Define and evaluate RF Digital PLL concepts (e.g., Fractional-N, ADPLL, Sub-sampling PLLs) and architectures tailored for high-frequency wireless applications Modeling & Noise Budgets : Develop high-level behavioral models (e.g., MATLAB, Simulink, Verilog-A) to analyze and optimize RF PLL loop dynamics, jitter, spurs, and stringent phase noise performance . Circuit Design & Implementation: Translate concepts into high-performance RF and mixed-signal circuits, focusing on critical blocks such as VCOs/DCOs, high-speed frequency dividers (prescalers), Phase-Frequency Detectors, and Charge Pumps, TDC, DTC Digitally-Assisted RF Calibration: Architect and verify digital calibration algorithms for PLL (e.g., spur mitigation, and mismatch compensation, TDC, DTC calibrations) to enhance RF performance System Partitioning: Partner closely with system architects, digital, and RF frontend teams to optimize mixed-signal and RF system partitioning for transceiver architectures Layout & Silicon Characterization: Guide layout engineers to preserve RF signal integrity, minimize parasitic effects, and ensure optimal isolation. …
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This role centers on Rf Design, Pll, Frequency Synthesizers, and Phase Noise Analysis. There are 28 open roles at Infineon right now.
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