SoC Principal Physical Design Engineer

Please note: Preferred location is Auston, however alternate locations can be Dallas, Phoenix and Mountain View.

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are You have spent over a decade taking complex SoCs from RTL to silicon, and you know that the difference between a chip that meets PPA and one that doesn't often comes down to decisions made during floorplanning or a CTS strategy that accounts for what the foundry PDK will actually give you at 3nm. You are the engineer who sees congestion coming three steps ahead and adjusts before it becomes a crisis that delays tapeout. Working at advanced nodes is not new to you. You have closed timing on multi-billion transistor designs where every picosecond matters and every milliwatt counts. You know when to push the tools harder and when to step back and rethink the approach. Customers trust you because you do not just run flows, you understand why they work and when they won't. You are comfortable leading technical conversations with design teams, applications engineers, and customers who need real answers, not platitudes. Mentoring comes naturally because you remember what it was like to debug your first IR drop violation at 2am before tapeout. At Synopsys, you will work on the hardest physical design problems in the industry, with the tools that define the state of the art, and with customers who are building the next generation of silicon.

What You'll Be Doing

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