Sr. Semiconductor Test Engineer

Mythic builds AI inference processors based on analog compute-in-memory, an architecture that puts unusual demands on test: analog behavior, process variation, and trim and calibration all matter alongside conventional digital coverage. We are looking for a hands-on test engineer to own production test across the full silicon lifecycle, from bring-up and characterization through Wafer Sort, Final Package Test, and high-volume manufacturing. This is not a maintenance role. This is a build role. You will define how Mythic tests and ships silicon: the methodology, coverage strategy, screening philosophy, and release criteria, and the test programs and infrastructure that put them into practice. You will set strategy and also write code, debug hardware, and dig into manufacturing data yourself, working closely with design, DFT, product engineering, reliability, and manufacturing.

What you'll own

• Mythic’s end-to-end production test strategy across Wafer Sort, Final Package Test, characterization, screening, and volume ramp
• Test programs for new silicon products, from development and debug through production release and optimization
• Test methodology, coverage strategy, screening philosophy, and release criteria
• Silicon bring-up, characterization, correlation, guardbanding, and test transfer into manufacturing
• Yield and quality analysis: finding systematic failures and escapes and driving them to root cause
• Day-to-day technical work with OSATs, foundries, and ATE vendors to deploy and sustain test flows
• Tradeoffs across test coverage, cost, test time, quality, and ramp schedule
• Infrastructure, automation, and analytics for production test and yield learning

What you'll bring Required qualification

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