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Staff Design Verification Engineer, AI Hardware

Tenstorrent · Belgrade, Central Serbia · Posted 9 days ago

hybridic
UVMSystemVerilogRTL designFunctional verificationFormal verificationSimulationEmulationCoverage analysis

Own verification strategy for major AI and compute IP blocks, leading closure from concept through tape-out on massively parallel architectures.

You’ll join Tenstorrent’s AI Hardware team in Belgrade, building the silicon behind Tenstorrent’s custom AI platform. As a Staff Design Verification Engineer, you will play a critical role in ensuring the quality and reliability of our digital designs through comprehensive verification methodologies. The successful candidate will have a strong background in verification techniques, excellent problem-solving skills, and a passion for delivering high-quality designs.

This role is hybrid, based out of Belgrade, Serbia.

  • Verification expert with a proven record of validating complex, high-performance digital designs from concept to silicon.
  • Strong command of advanced verification methodologies such as UVM, with a deep understanding of RTL design and system-level behavior.
  • Comfortable operating as a technical lead—guiding verification strategy, mentoring engineers, and driving closure across large-scale programs.
  • Highly analytical and hands-on, with strong communication skills and a drive to deliver silicon that works exactly as designed.
  • Define and lead verification strategies for major IP and subsystem blocks across AI and compute architectures.
  • Architect and maintain reusable, scalable verification environments and verification infrastructure to support multi-site development.
  • Build verification, test, and coverage plans with traceable requirements.
  • Drive coverage convergence, debug complex design and performance issues, and ensure quality signoff ahead of tape-out.
  • Collaborate with design, architecture, and validation teams to improve design-for-verification practices and streamline bring-up cycles.
  • How Tenstorrent verifies cutting-edge, massively parallel compute architectures for next-generation AI workloads.
  • Advanced techniques for functional and formal verification at scale, using modern simulation and emulation platforms.
  • System-level debug workflows that span hardware, firmware, and compiler layers.
  • How architectural choices impact power, performance and functional validation outcomes.
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There are 128 open roles at Tenstorrent right now. This role centers on Uvm, Rtl Design, and Functional Verification.

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